Just a heads up on this cheap adaptor. I've got something just like it from Amazon UK.
I had to change the clocks of QLC+ and the adaptor to 18Hz to get it running smoother.
I found this:
https://github.com/MalteP/udmx/blob/mas ... Readme.txt
12 MHz Clock
This is the traditional clock rate of V-USB because it's the lowest clock rate where the timing constraints of the USB spec can be met.
15 MHz Clock
Similar to 12 MHz, but some NOPs inserted. On the other hand, the higher clock rate allows for some loops which make the resulting code size somewhat smaller than the 12 MHz version.
16 MHz Clock
This clock rate has been added for users of the Arduino board and other ready-made boards which come with a fixed 16 MHz crystal. It's also an option if you need the slightly higher clock rate for performance reasons. Since 16 MHz is not divisible by the USB low speed bit clock of 1.5 MHz, the code is somewhat tricky and has to insert a leap cycle every third byte.
12.8 MHz and 16.5 MHz Clock
The assembler modules for these clock rates differ from the other modules because they have been built for an RC oscillator with only 1% precision. The receiver code inserts leap cycles to compensate for clock deviations. 1% is also the precision which can be achieved by calibrating the internal RC oscillator of the AVR. Please note that only AVRs with internal 64 MHz PLL oscillator can reach 16.5 MHz with the RC oscillator. This includes the very popular ATTiny25, ATTiny45, ATTiny85 series as well as the ATTiny26. Almost all AVRs can reach 12.8 MHz, although this is outside the specified range.
See the EasyLogger example at
http://www.obdev.at/vusb/easylogger.html for code which calibrates the RC oscillator based on the USB frame clock.
18 MHz Clock
This module is closer to the USB specification because it performs an on the fly CRC check for incoming packets. Packets with invalid checksum are discarded as required by the spec. If you also implement checks for data PID toggling on application level (see option USB_CFG_CHECK_DATA_TOGGLING in usbconfig.h for more info), this ensures data integrity. Due to the CRC tables and alignment requirements, this code is bigger than modules for other clock rates. To activate this module, you must define USB_CFG_CHECK_CRC to 1 and USB_CFG_CLOCK_KHZ to 18000 in usbconfig.h.
20 MHz Clock
This module is for people who won't do it with less than the maximum. Since 20 MHz is not divisible by the USB low speed bit clock of 1.5 MHz, the code uses similar tricks as the 16 MHz module to insert leap cycles.